Enable the MMU even if the kernel is not loaded in physical memory at
the same place it was linked against.
This commit is contained in:
parent
e2a3ab602c
commit
d6e3899fc1
205
boot/start.S
205
boot/start.S
@ -1,51 +1,170 @@
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interrupt_vector_table:
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b . @ Reset
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b .
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b . @ SWI instruction
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b .
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b .
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b .
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b .
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b .
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.comm stack, 0x10000 @ Reserve 64k stack in the BSS
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/*
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* Kernel entry in assembly. This handles relocating the kernel so that it is
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* in both physical and virtual memory where we want it to be. We copy the
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* kernel to a different physical location if necessary, turn on the MMU,
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* setting up a dual-mapping if the kernel is not in physical memory at the
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* same place it was linked against. Finally, we jump into the kernel's main()
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* function in C using the address it is linked against. When the MMU gets
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* initialized fully later, it will remove the initial 1:1 mapping.
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*/
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.globl start
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start:
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ldr r0, tt_base
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mcr p15, 0, r0, c2, c0, 0 /* TTBR0 */
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str r1, machine_type /* Backup atags/machine type registers so we can access them later from C */
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str r2, atags_ptr
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/* Setup page table entries for the page table and kernel (domain 0) */
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ldr r0, tt_tt_addr
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ldr r1, tt_tt_val
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str r1, [r0]
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bl copy_kernel
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copy_kernel_lr: /* Used to calculate address at which kernel is currently loaded by copy_kernel */
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ldr r0, kernel_tt_addr
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ldr r1, kernel_tt_val
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str r1, [r0]
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bl setup_mmu
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/* Set access permissions for domain 0 to "Manager" */
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mov r0, #0x3
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mcr p15, 0, r0, c3, c0, 0 /* DACR */
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/* Enable the MMU */
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mrc p15, 0, r0, c1, c0, 0 /* SCTLR */
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orr r0, r0, #0x1
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mcr p15, 0, r0, c1, c0, 0 /* SCTLR */
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ldr sp, =stack+0x10000 @ Set up the stack
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bl main @ Jump to the main function
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ldr sp, =stack+0x10000 /* Set up the stack */
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bl main
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1:
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b 1b @ Halt
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b 1b /* Halt */
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tt_base:
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.word 0x80000000
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tt_tt_addr:
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.word 0x80002000
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tt_tt_val:
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.word 0x80000c02 /* ...c02 means read/write at any priviledge level, and that it's a section w/o PXN bit set */
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kernel_tt_addr:
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.word 0x80002004
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kernel_tt_val:
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.word 0x80100c02
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copy_kernel:
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/*
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* Because we're not necessarily loaded at an address that's aligned the same
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* as where we're linked, copy the kernel over to fix that up.
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*
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* clobbers:
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* r0-r10
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* returns:
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* r0 = new kernel base address
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*/
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sub r0, lr, $(copy_kernel_lr - start) /* r0 <- current address of start */
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ldr r1, tt_section_align
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ands r2, r0, r1 /* If we're already aligned to 1mb, early out */
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bxeq lr
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mov r2, r0 /* r2 <- r0 <- current address of start */
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mov r3, #1
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lsl r3, r3, #20 /* r3 <- 1mb */
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add r0, r0, r3
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bic r0, r0, r1 /* r0 <- new address of start */
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sub r1, r0, r2 /* r1 <- offset between current and new start */
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/* TODO only copy kernel image sections that aren't zeroed (leave out .bss) */
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ldr r5, =start
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ldr r6, =kernel_end
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sub r6, r6, r5
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add r6, r6, r2 /* r6 <- old kernel_end */
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add r6, r6, #16
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bic r6, r6, #0xf /* r6 <- old kernel_end (aligned to 16 bytes) */
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add r5, r6, r1 /* r5 <- new kernel_end */
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copy_kernel_loop:
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/* Copy the kernel to its new location, 16 bytes at a time. We do this
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* from the end to the begininning so we don't overwrite the old kernel if the
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* destination and source overlap. */
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sub r6, r6, #16
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sub r5, r5, #16
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ldm r6, {r7, r8, r9, r10}
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stm r5, {r7, r8, r9, r10}
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subs r4, r5, r0
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bne copy_kernel_loop
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add lr, lr, r1 /* Fixup link register for new kernel location */
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bx lr
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setup_mmu:
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/*
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* Calculate the address at which we will store our translation table.
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* Currently, we store it just past the end of the kernel. Getting the physical
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* address of the end of the kernel is tricky, since kernel_end is the address
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* the end of the kernel is linked at, so we have to do a little math.
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*
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* arguments:
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* r0 = current kernel base address (physical), aligned to 1mb boundary
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* clobbers:
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* r0-r10
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*/
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/* Find future virtual address of the translation table */
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ldr r1, =kernel_end
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ldr r2, tt_base_align
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ands r3, r1, r2
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mov r3, r1
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addne r3, r1, r2
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bic r2, r3, r2 /* r2 <- future virtual address of translation table */
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str r2, tt_base_virtual
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/* Find physical address of the translation table */
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ldr r1, =start
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sub r1, r2, r1
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add r1, r0, r1 /* r1 <- physical address of translation table */
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str r1, tt_base_physical
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/* How many sections do we need to map to make sure we have the kernel
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* and translation table covered? */
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ldr r3, tt_base_align
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add r3, r3, r1
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sub r3, r3, r0
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lsr r3, r3, #20
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add r3, r3, #1 /* r3 <- number of sections to map */
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ldr r4, =start /* r4 <- kernel virtual start address */
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lsr r5, r4, #18 /* 18 = 20 (1mb) - 2 (4 bytes per entry) */
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add r5, r5, r1 /* r5 <- address of translation page entry for first kernel section (final mapping) */
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mov r6, r0 /* r6 <- kernel physical start address */
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lsr r7, r6, #18 /* 18 = 20 (1mb) - 2 (4 bytes per entry) */
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add r7, r7, r1 /* r7 <- address of translation page entry for first kernel section (initial, 1:1 mapping) */
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mov r8, #1
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lsl r8, r8, #20 /* r8 <- 1mb */
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mov r9, #0xc
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lsl r9, r9, #8
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orr r9, r9, #2 /* r9 <- 0xc02, which means read/write at any priviledge level, and that it's a section w/o PXN bit set */
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initial_tt_loop:
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/* Setup translation table entries for the translation table and kernel (domain 0) */
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ldr r10, tt_section_align
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bic r10, r6, r10
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orr r10, r10, r9 /* r9=0xc02, which means read/write at any priviledge level */
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str r10, [r7]
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str r10, [r5]
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add r6, r6, r8
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add r7, r7, #4
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add r5, r5, #4
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subs r3, r3, #1
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bne initial_tt_loop
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mcr p15, 0, r1, c2, c0, 0 /* TTBR0 <- physical address of translation table */
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/* Set access permissions for domain 0 to "Manager" */
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mov r1, #0x3
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mcr p15, 0, r1, c3, c0, 0 /* DACR */
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/* Enable the MMU */
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mrc p15, 0, r1, c1, c0, 0 /* SCTLR */
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orr r1, r1, #0x1
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mcr p15, 0, r1, c1, c0, 0 /* SCTLR */
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/* Update lr for new memory mapping */
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ldr r1, =start
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sub r0, r1, r0
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add lr, lr, r0
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bx lr /* Finally, we jump into the new memory mapping, which matches where we were linked */
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tt_base_align:
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.word 0b111111111111111 /* 16k - 1 */
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tt_section_align:
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.word 0b11111111111111111111 /* 1mb - 1 */
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.globl tt_base_virtual
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tt_base_virtual:
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.word 0
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.globl tt_base_physical
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tt_base_physical:
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.word 0
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.globl atags_ptr
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atags_ptr:
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.word 0
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.globl machine_type
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machine_type:
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.word 0
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.comm stack, 0x10000 /* Reserve 64k for the stack in .bss */
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@ -1,6 +1,8 @@
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#ifndef MMU_H
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#define MMU_H
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extern unsigned int *kernel_start_phys, *kernel_start_virt, *kernel_end_phys, *kernel_end_virt;
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void mmu_reinit();
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#endif /* MMU_H */
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29
kernel/mmu.c
29
kernel/mmu.c
@ -10,20 +10,41 @@
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#define cp_read(var, ...) _cp_read(var, __VA_ARGS__)
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#define cp_write(var, ...) _cp_write(var, __VA_ARGS__)
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#define TT_BASE_SIZE (1<<14) /* 16k */
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unsigned int *kernel_start_phys, *kernel_start_virt, *kernel_end_phys, *kernel_end_virt;
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void mmu_reinit() {
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unsigned int *curr_tt_entry;
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extern unsigned int tt_base_virtual, tt_base_physical, start;
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unsigned int curr_addr;
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unsigned int *curr_tt_entry;
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int virt_phys_offset;
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virt_phys_offset = tt_base_virtual - tt_base_physical;
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kernel_start_virt = &start;
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kernel_start_phys = kernel_start_virt - virt_phys_offset/4;
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kernel_end_virt = (unsigned int *)(tt_base_virtual + TT_BASE_SIZE);
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kernel_end_phys = (unsigned int *)(tt_base_physical + TT_BASE_SIZE);
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//get the current translation table base address
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cp_read(curr_tt_entry, TTBR0);
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curr_tt_entry = (unsigned int *)tt_base_virtual;
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//do first loop iteration outside the loop, because we have to check against wrapping back around to know we're done
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*curr_tt_entry = 0xc02;
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*curr_tt_entry = 0xc02; /* 0xc02 means read/write at any priviledge level, and that it's a section w/o PXN bit set */
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curr_tt_entry++;
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//create identity mapping for entire address space using sections
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//create identity mapping for entire address space using sections.
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//BUT, if we've relocated the kernel from where it is in physical
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//memory, make sure we keep those mappings correct, and we'll actually
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//swap the twp mappings so all of memory is addressable.
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for (curr_addr = 0x00100000; curr_addr != 0; curr_addr += 0x00100000) {
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if ((unsigned int *)curr_addr >= kernel_start_phys && (unsigned int *)curr_addr < kernel_end_phys) {
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*curr_tt_entry = (curr_addr + virt_phys_offset) | 0xc02;
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} else if ((unsigned int *)curr_addr >= kernel_start_virt && (unsigned int *)curr_addr < kernel_end_virt) {
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*curr_tt_entry = (curr_addr - virt_phys_offset) | 0xc02;
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} else {
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*curr_tt_entry = curr_addr | 0xc02;
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}
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curr_tt_entry++;
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}
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}
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@ -7,8 +7,6 @@
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#include <framebuffer.h>
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#include <console.h>
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extern const unsigned int kernel_end;
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struct fb myfb;
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void video(void) {
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@ -64,7 +62,8 @@ int main(void) {
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//setup memory
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mm_init();
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mm_add_free_region((void*)0x60000000, (void*)0x7FFFFFFF);
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lower = (char*) &kernel_end;
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mm_add_free_region((void*)0x80000000, (void*)0x800FFFFF);
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lower = (char*) &kernel_end_virt;
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if ((unsigned int)lower % MM_PAGE_SIZE != 0)
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lower += (MM_PAGE_SIZE - ((unsigned int)lower % MM_PAGE_SIZE));
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mm_add_free_region((void*)lower, (void*)0x9FFFFFFF); //subtract the memory used by the kernel
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